1. Field of the Invention
The present invention relates to a substrate aligner apparatus.
2. Brief Description of Related Developments
Integrated circuits (IC) are produced from substrates (wafers) of semiconductor material. During IC fabrication wafers are typically housed in cassettes and moved to processing stations where the wafers are removed from the cassette via a substrate transporter and placed in a wafer aligner to effect a predetermined orientation that is desired for further processing of the wafer.
In conventional aligners, the substrate transporter may place the wafer on the wafer aligner and then move away from the aligner during the wafer alignment process. This results in increased wafer alignment times arising from the substrate transporter extension and retraction before and after the wafer alignment process. Also, if the alignment feature or fiducial of the wafer is placed over an aligner feature, such as the alignment chuck rest pads, masking the wafer fiducial from the fiducial sensor of the aligner, this will result in wafer placement and fiducial sensing re-tries, thereby further adding to the alignment time. Both the repeated movements of the substrate transporter during the alignment process and the obstruction of the wafer alignment feature create inefficiencies in the alignment process thereby decreasing the throughput of wafer processing and production.
Due to potential substrate transporter re-tries in placing the wafer on the aligner and the large numbers of wafers processed through the aligner, the time that is needed to align a batch of wafers for processing can increase substantially. Table 1 below illustrates a conventional alignment process with a conventional substrate aligner.
TABLE 1EstimatedPass NumberDescriptionTime (sec)1Transporter extends to aligner1.02Places the wafer on the aligner0.8chuck3Transporter partially retracts0.54Aligner scans 360 degrees for1.5fiducial5If fiducial is not found (i.e.—covered by the chuck pads) aretry is needed6Chuck goes to safe zone to clear0.4the path for the transporter endeffector7Transporter extends0.58Transporter lifts the wafer (no0.3end effector edge grip actuation)9Aligner rotates chuck slightly0.2towards the safe zone to uncoverthe notch10Transporter drops the wafer on0.3chuck11Transporter retracts partially0.512Aligner scans 360 deg. for1.5fiducial and finds that at thepost position the transporterpick path is obstructed13Transporter extends0.514Transporter lifts the wafer0.315Aligner moves the chuck to within0.4the safe zone16Transporter drops the wafer on0.3chuck17Aligner moves the chuck as close0.2as possible to the desired post-position and the chuck within thesafe zone18Repeat items 14-17 until the—fiducial is at the desired post-position and the chuck within thesafe zone19Transporter lifts and grips the0.8wafer20Transporter retracts to home1.0Total Time>11
In addition to the increased alignment times, wafer walking may be induced into the alignment process as a result of the repeated lifting and placing of the wafer to and from the alignment chuck. Further, each additional pick of the wafer increases the possibility of backside damage or contamination.
With conventional aligner designs it is not possible to reliably detect the fiducial when it is placed on top of the chuck pad due to the use of a through beam sensor. It is also not possible to arbitrarily orient the wafer without obstructing the pick path of the substrate transporter nor is it guaranteed that the wafer be aligned in less than two substrate transporter re-tries. The number of re-tries needed to properly align the wafer with conventional aligners also jeopardizes the accuracy of the fiducial post position. In addition, the alignment of the wafer cannot be performed with the substrate transporter extended under the aligner, thus requiring additional extend/retract motions by the substrate transporter for each alignment operation performed.
U.S. Pat. Nos. 6,468,022 B1 and 6,357,996 B2 disclose examples of conventional substrate aligners that utilize edge rolling for wafer fiducial detection and expensive edge sensing devices.
The exemplary embodiments of the present invention overcome the problems of conventional wafer aligners as will be described further below.